The present invention relates generally to sub-systems in electronic devices, and more specifically, to a method and system for managing communications between sub-systems in communication devices.
Communication device transceivers generally have three sub-systems, namely a Radio Frequency Integrated Circuit (RFIC), a mixed signal integrated circuit and a Baseband Integrated Circuit (BBIC). Recently, advancements in silicon technology have resulted in a transceiver with only two sub-systems, an RFIC and a BBIC. The RFIC and the BBIC exchange data and control signals through a digital interface. In the field of mobile communications, a consortium named as ‘Digital Radio Frequency’ (DigRF) has been formed, which specifies various sub-system interfaces in communication devices. The DigRF consortium has also added an interface of third generation Radio Frequency (RF) components and the BBIC known as ‘Digital Radio Frequency Third Generation’ (DigRF3G) interface. The DigRF3G standard defines the digital interface and the data transfer functionality in third generation communication devices.
In mobile communication systems such as Global System for Mobile Communications (GSM), Enhanced General Packet Radio Service (EGPRS) and Universal Mobile Telecommunications System (UMTS), the paging channel is used by a base station to transmit a message to a communication device to indicate that there are incoming data packets. When the communication device is not in use, it enters a sleep mode. While in the sleep mode, the communication device periodically wakes up to monitor the paging channel. The sleep mode of the communication device helps conserve power. The exit of the communication device from the sleep mode requires establishing a link through a handshaking sequence of control frames between the RFIC and the BBIC.
In a typical communication device, entry and exit from sleep mode is accomplished by a low power sequencer present in the communication device. The low power sequencer is a digital circuit, which is useful in synchronization of various processes in the communication device. In present communication systems, a low power sequencer turns on the processing engine (core or main processor) in the BBIC. Subsequently, the processing engine initializes the interface between the RFIC and the BBIC. This processing engine is the most power consuming component in the BBIC. Therefore, participation of the processing engine during the initialization of the DigRF3G interface causes large power dissipation.